Arista 7130E Series FPGA-enabled switches

The 7130E FPGA-enabled devices leverage FPGA technology to enable the development and deployment of cutting-edge network applications. Available in 32, 48 or 96 SFP+ port options, the 7130 is multiple devices in one; performing layer 1+ switching in only 5 ns, enabling unrestricted access to an onboard FPGA and containing an x86_64 server.

7130

The devices provide layer 1+ configurable features such as dynamic patching, tapping, one-to-many replication, media conversion, packet stats and precise timestamping. The also include the following functionality:

  • Up to 3 FPGAs on a single device
  • 5 ns layer 1 switching between front panel ports
  • 3 ns latency from front panel to FPGA
  • Best of breed FPGA partners
  • Various specifications for RAM and Transceivers
  • Development toolkits and low-latency IP Cores

The Arista 7130E Series is optimised for Arista’s MetaMux network application and can equally be leveraged to run 3rd party partner applications. FPGA application developers can utilise the platform to deploy and deliver their performance critical apps. On top of the market-leading FPGA functionality, the devices combine a multitude of Layer 1+ network functionality on to the same devices:

  • Signal regeneration
  • Port mirroring
  • Dynamic patching/link management
  • Ad-hoc tapping without rewiring
  • Layer 1+ statistics on every link
  • Media conversion
  • Telemetry and more

Arista 7130E Technical Specifications

Model Comparison of 7130E Series devices

7130E Series Devices
Model

FPGA

FPGA Qty

SFP+ Ports

FPGA Ports

RU ePCIE PPS In/Out SSD Drive Bay
48E Xilinx Virtex® UltraScaleTM KU095 1 48 56 1   x  
48EP Xilinx Virtex® UltraScaleTM KU095 3 48 56 central/14 leaf 1   x  
96E Xilinx Virtex® UltraScaleTM KU095 1 96 56 2   x  
32EH Xilinx Virtex® UltraScaleTM VU9P 3 32 56 1 x x x
48EB Xilinx Virtex® UltraScaleTM VU9P 1 48 56 1   x  
48EH Xilinx Virtex® UltraScaleTM VU9P 3 48 56 central/14 leaf 1   x  

 

Robust switches with comprehensive feature sets

Feature Description
Simplified stack Fan-out with 5 ns of latency, equivalent to a single metre of fiber or copper interconnect, and insignificant jitter.
Integrated with existing FPGA tools Reduce costs by converting between different Ethernet media types e.g. one end of a link can be twinax and the other 10GBASE-LR single-mode fiber.
Layer 1+ functionality Save rack space and reduce complexity by leveraging dynamic patching, tapping, one-to-many replication, telemetry and comprehensive port statistics on a single device.
Feature rich Avoid the need to build features in-house by leveraging Arista’s access control, syslog, SNMP, packet stats, tcpdump, JSON RPC API, time series data, streaming telemetry and more - included as standard within the 7130 Series.
Easy app deployment Streamline operational processes through Arista’s built-in application infrastructure which allows developers to wrap applications into simple packages for deployment.
Enterprise ready Deploy FPGA applications with ease - the FPGA platform integrates with a 64-bit x86 management processor and the MOS Operating system to provide user extensible solutions.
Ultra-low latency Fan-out with 5 ns of latency, equivalent to a single metre of fiber or copper interconnect, and aggregate in 45 ns.

 

MOS Operating System

MOS provides a core set of features that are common across the 7130 platform. It is based on Linux and provides a command line and web interface as well as support for other management protocols. MOS provides a standard, mature and powerful platform with the commands, tools and packages such as syslog, net-snmp, daemons, RPMs, Bash, Python, authentication, and security.

MetaMux

MetaMux is a ultra-low latency network application designed for Arista’s 7130E switches performing multiplexing/aggregation of incoming streams in an average of 45 ns*.

 

MetaWatch

The MetaMux application provides a configurable number of multiplexer (mux) options all the way from 48:1 down to multiple 4:1 mux instances. To allow for the situation where multiple packets arrive at the multiplexer at the same time, Metamux will queue packets in its input buffers to ensure contending packets can be sent on the link. Buffer utilisation and statistics are available from the device. For more information visit the Applications page.