Tag :: CPU

Arista switches provide several mirroring features. Filtered mirroring to CPU adds a special destination to the

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For packets received on the front-panel interfaces and delivered to the CPU interface, this feature allows creation of a profile to configure buffer reservations for the egress CPU queues in the MMU (MMU = Memory Management Unit which manages how the on-chip packet buffers are organized).

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By default, when an SVI is configured on a VXLAN VLAN, then broadcast, unknown unicast, and unknown multicast (BUM) traffic received from the tunnel are punted to CPU. However, sending unknown unicast and unknown multicast traffic to CPU is unnecessary and could have negative side effects. Specifically, these packets take the L2Broadcast CoPP queue to the CPU. 

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