Compatible platforms start up in the “default” forwarding-table partition mode, which provides the ability to program up to 8K L2 addresses.

At its most basic level, as shown in Figure 1, the packet forwarding pipeline for a switch with an application-specific integrated circuit (ASIC) typically consists of ingress pipelines and egress pipelines, a memory management unit for storing and transmitting packets and metadata between the pipelines, and a path to punt packets and receive instructions from the central processing unit (CPU).