Precision Time Protocol (PTP) management messages are general messages sent to PTP-enabled switches on the data plane. On Arista switches, its behavior depends on the configured PTP mode. 

Until now, all PTP packets received on Arista switches with PTP boundary mode enabled will automatically be sent to

PTP 1-step Boundary Clock (or 1-step BC) is similar to 2-step BC in function, but doesn’t send the PTP followup message. The timestamp present in the PTP followup message’s preciseOriginTimestamp field is sent in the PTP sync message’s originTimestamp field along with a non-zero correctionField.

This brief TOI describes a small update made to Arista’s implementation of the Best Master Clock Algorithm (BMCA),

Media Access Control Security (MACsec) is an industry-standard encryption mechanism that protects all traffic flowing on the Ethernet links. MACsec is based on IEEE 802.1X and IEEE 802.1AE standards.

This feature allows users to view most recent history of offset from master, mean path delay and skew values via CLI

Since the introduction of PTP Monitoring feature[1], PTP is capable of recording recent metrics for offset from

This TOI document describes the supported Precision Time Protocol (PTP) functionality on the CCS-750X platforms. Due to the nature of the hardware for these products, the supported PTP functionality and interoperation with other features may differ from other Arista products.

The `ptp forward-v1` command configures the switch to forward Precision Time Protocol version 1 packets as regular multicast traffic. By default, when PTP is enabled and PTPv1 packets are received on the PTP enabled interfaces, these packets are trapped by the CPU, logged and discarded.

This feature enables L3 reachability for the PTP on the switch using one or more shared “Loopback” interfaces.

This article describes the usage of the ptp free-running source clock command, which selects a time source used by a switch running the Precision Time Protocol (PTP) while it is in a free-running state.

From the Precision Time Protocol (PTP) perspective, Multi Chassis Link Aggregation (MLAG) peers are two physical

Synchronous Ethernet (SyncE) provides support for frequency synchronization over Ethernet between devices traceable to an external frequency reference, like a primary reference clock, as specified in ITU G.8261.

This feature makes the PTP agent aware of VLANs, running with a single Best Master Clock Algorithm (BMCA). It allows