The Arista 7130E and L Series devices leverage the latest FPGA technology to enable the development and deployment of cutting-edge network applications. Arista provides a set of mature development kits as well as IP Cores to enable firms to build their own applications based on these building blocks.
Arista 7130 FPGA Development Kit (Arista FDK)
The Arista FDK provides the documentation, libraries and examples which enable developers to build new FPGA applications running on Arista's 7130 platform. The development environment includes:
- Hardware documentation and information (currently supporting the 7130 E, EH, L and LB development standards)
- IP Cores
- Working example applications, including example build systems*
- Support resources to correctly build FPGA applications
* The examples in the Arista FDK target the MOS operating system, and its MOSAPI SDK. As the 7130 series transitions to EOS, these applications will transition to an enhanced EOS SDK. Please get in touch to discuss your specific SDK feature requirements. EOS application examples will be added in 2021.
The Arista FDK includes all current Arista IP Cores (FPGA libraries). These include:
- 10G MAC-PHY IP Core: an Ultrascale/Ultrascale+ MACPHY, which is a combined 10GbE/1GbE, low latency design that implements the MAC, PCS & PMA reconciliation layers as four independent channels grouped per the Xilinx transceiver "Quad."
- 25G MAC-PHY IP Core: an Ultrascale/Ultrascale+ MACPHY, which is a combined 25GbE, low latency design that implements the MAC, PCS & PMA reconciliation layers as four independent channels grouped per the Xilinx transceiver "Quad.”
- Mux IP Core: an Ultrascale+ 10GbE Mux, which is Arista's low latency MetaMux application in an IP Core, with the addition of fabric AXI4 stream interfaces to inject packets directly from the custom logic.
- TS IP Core: a clock synchronisation and timestamping core which combines both hardware and software components to synchronise the hardware within 7130 to a PPS, PTP or NTP time source, and use that synchronised clock to measure timestamps.
Arista Switch Development Kit for Vitis™
Xilinx Vitis is a powerful tool, designed by Xilinx, to better enable FPGA development. Vitis is designed to make it simpler to build FPGA applications using higher-level languages, reusable blocks, and a statically configured Vitis Target Platform in the FPGA. Arista provides support for Vitis development, via these Vitis Target Platforms which run on the LB development standard and support the many Ethernet interfaces provided by the 7130LB devices. The switch's internal CPU connects via PCIE to the FPGA, and supports XRT, giving a similar development experience to that of a server with an add-in PCIE card.
The Arista Switch Development Kit for Vitis provides:
- MOS support for running Vitis target platforms. Arista's MOS includes Xilinx's XRT and its drivers;
- A Vitis target platform for the FPGA in the Arista 7130 LB devices;
- An Arista app for managing the shells installed on a switch;
- An Arista 10GbE Ethernet kernel, including an example application using the Ethernet kernel;
- Example Vitis projects, including Xilinx's Market Maker example, and a software layer used to integrate this into the switch's operating system.
Note: The Arista FPGA Dev Kit for Vitis supports the MOS Operating System. Along with the Arista FDK, support for Arista's EOS will be added in 2021.
Several tried & tested integrations exist via our technology partners. We enable our partners to deliver value and differentiation in a highly competitive marketplace. Joint innovation with our partners has proven to generate powerful complementary solutions that run on the 7130 platform and offer clients additional capabilities: optimized analytics, data capture solutions, and more.
- .Case Study: Enyx chooses Arista to accelerate ultra-low latency solutions for major financial Service Providers