- Written by Robert Esposito
- Posted on April 27, 2020
- Updated on October 27, 2022
- 9188 Views
Arista switches provide several mirroring features. Filtered mirroring to CPU adds a special destination to the
- Written by Mukund Mundhra
- Posted on January 3, 2023
- Updated on January 18, 2023
- 74 Views
For packets received on the front-panel interfaces and delivered to the CPU interface, this feature allows creation of a profile to configure buffer reservations for the egress CPU queues in the MMU (MMU = Memory Management Unit which manages how the on-chip packet buffers are organized).